1. Field of the Invention
The present Invention relates to failure analysis technology in a semiconductor device fabrication process, and more especially to a method for improving detection sensitivity of a scratch (polish scratch) caused in a chemical mechanical polishing process of a fabrication method of the semiconductor device.
2. Description of Related Art
In recent years, new shrinking technology has been developed as development of high performance and highly integrated semiconductor integrated circuits (LSI) progresses. Chemical Mechanical Polishing (CMP) is one such process, and is applied to such processes as forming built-in wiring patterns and planalizing insulating films in a multi-layer interconnection process.
In general, CMP of the insulating film is performed by a chemical mechanical polishing process using fine particles contained in a slurry (polishing liquid). Polishing is accelerated owing to a cooperative process using a chemical etching agent such as an alkali liquid contained in the slurry. A polishing process with good evenness becomes possible, owing to a balance between the mechanical process and the chemical process. The fine particles contained in the slurry are particles of alumina, silica, and so forth having a particle diameter of several tens to several hundred nm, and liquid containing potassium hydroxide (KOH) or ammonium hydroxide (NH4OH), etc. is employed as a chemical component.
However, in CMP, a scratch in a lower base layer can be caused due to fine particles of the slurry used as polishing material. Although it is recognized that a scratch, similar to a failure of a pattern and the particle might cause a lower yield rate, it has been extremely difficult not only to identify a scratch from the particles adhered in a process other than the polishing process, but also to detect itself. Thus, it has not been possible to analyze a correlation between yield rate and scratches since it was impossible to investigate a particle occurrence mechanism and it has been insufficient to devise a countermeasure to the scratch.
In a device having a structure in which a silicon oxide film, a silicon nitride film, and a silicon oxide film are layered on a silicon substrate in that order from a bottom position, CMP polishing is performed in order for a residual top layer of the oxide film to exist, and then an etchant for selectively etching a silicon nitride film is applied. A nitride film in a scratch portion, the depth of which is deeper than the depth of the oxide film, is only etched selectively, and only the scratch, the depth of which is deeper than the depth of the residual film of the oxide film, is exposed.
Further, in the other invention, a device having a structure in which a silicon oxide film and a silicon nitride film are layered repeatedly, performs CMP polishing in order for a residual top layer of the oxide film to remain, and then treats a nitride film using a selective etching liquid. Only a nitride film in a scratch portion, the depth of which is deeper than the depth of the residual film of the oxide film, is selectively etched, and only the scratch, the depth of which is deeper than the depth of the residual film of the oxide film and also reaches to respective nitride films, is exposed.